1. Field of the Invention
The present invention relates to an amplification-type solid-state image sensing device.
2. Description of the Related Art
Recently, amplification-type CMOS solid-state image sensing devices (CMOS image sensors) have become commercially available. The characteristic features of a CMOS image sensor are a single power supply, low-voltage driving (3 V), and low power consumption (about 50 mW). The CMOS image sensor includes photoelectric conversion elements and transistors arrayed on a single substrate and is also increasing the number of pixels and reducing the size, like a CCD. In the CMOS image sensor, signal charges generated by a photoelectric conversion element modulate the potential of a signal charge storage unit, and the potential modulates an amplification transistor in a pixel, thereby imparting an amplification function to the pixel.
A conventional CMOS image sensor uses a P/P+ substrate in which a 5- to 10-μm-thick epitaxial layer of a P-type semiconductor layer containing B at a low concentration (e.g., 1×1015 cm−3) is formed on a base substrate (e.g., 1 to 3×1018 cm−3) (on the substrate surface side).
FIG. 6 is a sectional view near a photodiode (photoelectric conversion unit) portion of a CMOS image sensor formed by using a P/P+ substrate. The CMOS image sensor uses a P/P+ substrate because it can, e.g., shorten the lifetime of carriers (electrons) generated at a deep part of the substrate (in a region with a high B concentration). More specifically, even when strong light irradiates a photodiode 3 and generates carriers which are diffused to the deep part of the substrate, the electrons recombine in the region where the lifetime of carriers is short. Hence, the electrons are suppressed from leaking into the photodiode 3 adjacent to that irradiated with light through the deep part of the substrate. This suppresses blooming from the viewpoint of the characteristic of the device. A dark current from the deep part of the substrate can also be reduced. On the other hand, for example, a CCD conventionally uses an N substrate.
FIG. 7 is a sectional view near a photodiode portion of a CCD image sensing device formed by using an N substrate 10. B (boron) ions are implanted into the entire surface of the N substrate at, e.g., an acceleration voltage of 2.7 MV and a dose of 5E11 cm2 without using a mask, thereby forming a flat p-well 8. The flat p-well 8 of a p-type semiconductor layer is formed at a depth of about 3 to 4 μm from the substrate surface. The photodiode 3 that executes photoelectric conversion is formed on the substrate surface side (about 1 μm). In addition, p-type semiconductor regions (barrier wells) 7 of B are generally formed between the adjacent photodiodes 3 to electrically isolate them from each other.
As described above, the conventional CCD image sensing device uses an N substrate. The flat p-well 8 and barrier wells 7 are formed under and near the photodiode 3. The device structure of the CCD image sensing device is designed (the concentration of the flat p-well 8 is adjusted) to move electrons to the substrate if strong light irradiates the photodiode 3, and generated electrons overflow from the photodiode 3. That is, since the structure of the N substrate allows to discard some of electrons generated upon irradiation of extremely strong light (e.g., sunlight), blooming can be suppressed.
However, the sensitivity of the N substrate is lower than that of the P/P+ substrate because all electrons generated at a deep part of the substrate, e.g., electrons generated at a deeper position than the flat p-well 8 are discarded to the substrate. This especially results in a decrease in red sensitivity for long-wavelength light (red light) with a small absorption coefficient with respect to an Si substrate.
As described above, in a solid-state image sensing device using an N substrate, carriers (electrons) overflowed from the photodiode 3 can be discarded to the substrate. It is therefore easy to suppress blooming or color crosstalk. However, the N substrate is disadvantageous in size reduction of the element because the sensitivity is lower than that of a P/P+ substrate. To solve the problem of low sensitivity, the CCD applies a high voltage (e.g., 5 V) to the photodiode to widen its depletion layer, thereby efficiently collecting carriers to the photodiode.
However, in an amplification-type solid-state image sensing device (CMOS image sensor) characterized in low-voltage driving, unlike a CCD, it is impossible to make the depletion layer of the photodiode so wide as that of the CCD, and the sensitivity is hard to improve. The technical problem of the CMOS image sensor is how to form a well structure to efficiently collect carriers to the photodiode.
To solve this problem, use of an N/P+ substrate has been proposed. An N/P+ substrate is formed by using the same P+ substrate as the base substrate of the conventional P/P+ substrate and epitaxially depositing an n-type semiconductor layer on it. Using the N/P+ substrate, P (phosphorus) ions are implanted into the N epitaxial layer by an accelerator to form a photodiode (n-type semiconductor layer). In this case, the depletion layer of the photodiode widens as compared to the P/P+ substrate. The region where the photodiode collects electrons can spread to the deep part side of the substrate so that the sensitivity can improve.
However, the structure with a solid-state image sensing device formed on a conventional P/P+ substrate and the structure with a solid-state image sensing device formed on an N/P+ substrate pose several technical problems. One problem is electrical isolation of the photodiodes. In the conventional P/P+ substrate, the photodiodes (n-type semiconductor layers) 3 are formed in the p-type epitaxial layer, as shown in FIG. 6. Hence, the p-type semiconductor layer of a p-type epitaxial layer 9 isolates the adjacent photodiodes 3. In the N/P+ substrate, however, since the photodiodes are formed in the n-type epitaxial layer, the photodiodes electrically connect to each other.
Additionally, the N/P+ substrate cannot discard excess signal charges generated when, e.g., strong light irradiates the photoelectric conversion element, like a structure with a CMOS image sensor formed on a conventional P/P+ substrate. Hence, even the N/P+ substrate has the problems of blooming and color crosstalk, like the conventional P/P+ substrate.
The above-described problem that a CMOS image sensor using an N/P+ substrate or P/P+ substrate cannot discard excess signal charges is posed because there is no place to discard the excess signal charges, although the structure of a CCD using an N substrate allows to discard excess signal charges to the substrate.
A technique disclosed in Jpn. Pat. Appln. KOKAI Publication No. 2006-5265 uses a P+/N/P substrate and forms an element isolation region adjacent to a photoelectric conversion element to suppress blooming.
Jpn. Pat. Appln. KOKAI Publication No. 2002-198507 discloses a technique of surrounding the side and lower surfaces of a sensor unit of a CCD solid-state image sensing device by a P-WELL to prevent color crosstalk.